CSN-221: Computer Architecture and Microprocessors
(Autumn 2016-2017)B. Tech. (CSE & ECE) II Year, Semester I
- Students who have registered for this course, please join in Piazza.com class [Sign-up link: https://piazza.com/iitr.ac.in/fall2016/csn221].
- Class will start from July 19, 2016.
- This is a course of Four (4) credit.
- It consists of Three (3) lecture hours per week and One (1) hour tutorial for each of the four sub-batches.
- The basic thrust of the course would be to familiarize students with the architecture of a processor and machine level programming.
- We will try to stick to the basic course outline as given in Syllabus, but we may deviate a bit.
- Prerequisite: EC-104 (Digital Logic Design).
- Performance Evaluation: Class Work Sessional (CWS) = 25%, Mid-Term Exam (MTE) = 25%, End-Term Exam (ETE) = 50%.
- CWS (25% marks) will be computed by a weighted sum of different components.
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This is a core course for both B.Tech. (CSE) and B.Tech. (ECE) Second Year (Total Strength: ~184).
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Lecture Class Timings:
Mondays: 9 - 10 am, Tuesdays: 9 - 10 am and Thursdays: 9 - 10 am
Lecture Venue: LH-02 -
Tutorial Class Timings:
CS-1 : Thursdays (2-3 pm)
EC-1 (O5+O6): Wednesdays (2-3 pm)
Venue: W-202, Dept. of CSE
Venue: W-202, Dept. of CSE CS-2: Thursdays (3-4 pm)
Venue: W-201, Dept. of CSE EC-2 (O7+O8): Fridays (2-3 pm)
Venue: W-202, Dept. of CSE -
Course Webpage: http://faculty.iitr.ac.in/~sudiproy.fcs/courses/csn221_2016.html
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Piazza Course Site: https://piazza.com/iitr.ac.in/fall2016/csn221
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Moodle link: http://moodle.iitr.ac.in/course/view.php?id=16
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Course Instructor: Dr. Sudip Roy
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Office time to meet the Course Instructor (For any kind of doubt clearing): Monday - Friday (5:00 pm - 6:00 pm)
(To confirm the availability, please send an email before coming) -
Teaching Assistants for CS1 & CS2 Batches:
Varsha Agarwal (MTech II year)
Anita (MTech II year) -
Teaching Assistants for EC1 & EC2 Batches:
Ananya Singla (MTech II year)
Shalu (MTech II year)
Text Books: (Must Read):
[B1] David A. Patterson and John L. Hennessy, Computer Organization and Design: The Hardware/Software Interface, (Forth Edition), Morgan Kaufmann Publishers, 2008. (Fifth Edition is available)
[B2] William Stallings, Computer Organization and Architecture: Designing for Performance, (Ninth Edition), Prentice‐Hall of India, 2012.
[B3] Ramesh S. Gaonkar, Microprocessor Architecture, Programming, and Applications with the 8085, (Fifth Edition), Prentice‐Hall of India, 2002.
Reference Books:
[B4] M. Morris Mano, Computer System Architecture, (Third Edition), Prentice‐Hall of India, 1992.
[B5] John L. Hennessy and David A. Patterson, Computer Architecture: A Quantitative Approach, (Forth Edition), Morgan Kaufmann Publishers, 2006.
[B6] Barry B. Brey, The Intel Microprocessors, (Eighth Edition), Prentice‐Hall of India, 2008.
[B7] Mohamed Rafiquzzaman, Microprocessors and Microcomputer Development Systems: Designing Microprocessor Based Systems, Harper and Row Limited, 1984.---------------------------------------------------------------------------------
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