Books:
- Title: FinFET/GAA Modeling for IC Simulation and Design: Using the BSIM-CMG Standard (Jan. 2024)
Authors: Y. S. Chauhan, G. Pahwa, A. Dasgupta, D. Lu, S. Venugopalan, S. Khandelwal, J. P. Duarte, N. Paydavosi, A. M. Niknejad, and C. Hu
Publications:
2023:
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Journal:
- S. Kushwaha, A. Dasgupta, S. Roy, R. Sharma, "Fast Multi-ANN Composite Models for Repeater Optimization in Presence of Parametric Uncertainty for On-Chip Hybrid Copper-Graphene Interconnects", IEEE Access, 2023.
- S. Sarker, A. Kumar, M. Ehteshamuddin and A. Dasgupta, "Compact Modeling of Parasitic Capacitances in GAAFETs for Advanced Technology Nodes", IEEE Journal of Electron Devices Society, 2023.
- C. T. Tung, A. Dasgupta, H. Agarwal, S. Salahuddin and C. Hu, "A Compact Model of Perpendicular Spin-Transfer-Torque Magnetic Tunnel Junction", IEEE Transactions on Electron Devices, 2023.
- N. Mishra, P. Ranjan, A. Dasgupta, B. P. Pandey, S. Kumar and S. Roy, "Theoretical Insights of the Photocatalytic and Hydrogen Storage Ability of Two-dimensional (2D) MoSe2 (MX2) and MoSSe (MXY) (X=Se,Y=S) ML using DFT Study", IEEE Sensors Journal, 2023.
- A. Kumar, M. Ehteshamuddin, A. Gaidhane, A. Bulusu, S. Mehrotra and A. Dasgupta, "Universal Compact Model of Flicker Noise in Ferroelectric Logic and Memory Transistors", IEEE transactions on Electron Devices, 2023.
- A. Ashai, A. Jadhav, A. K. Behra, S. Roy, A. Dasgupta and B. Sarkar, "Deep Learning Based Fast BSIM-CMG Parameter Extraction for General Input Dataset", IEEE Transactions on Electron Devices, vol. 70, no. 7, 2023.
- Km Dimple, S. Guglani, A. Dasgupta, R. Sharma, S. Roy and B. K. Kaushik, "Modified Knowledge Based Neural Networks Using Control Variates for the Fast Uncertainty Quantification of On-Chip MWCNT Interconnects", IEEE Transactions on Electromagnetic Compatibility, 2023.
- K. Sheelvardhan, S. Guglani, M. Ehteshamuddin, S. Roy and A. Dasgupta, "Machine Learning Augmented Compact Modeling for Simultaneous Improvement in Computational Speed and Accuracy", Early Access, IEEE Transactions on Electron Devices, 2023. Conference:
- Km. Dimple, M. Ehteshamuddin, S. Guglani, A. Dasgupta and S. Roy, "Optimization of Eye Diagram Characteristics of MLGNR Interconnect Networks Using Fast ML Assisted Evolutionary Algorithm", IEEE Electrical Design of Advanced Packaging and Systems, Mauritius, Dec. 2023.
- A. K. Jakhar, S. Guglani, A. Dasgupta, and S. Roy, "Noise-Aware Uncertainty Quantification of MLGNR Interconnects using Fast Trained Artifical Neural Networks", IEEE Electrical Design of Advanced Packaging and Systems, Mauritius, Dec. 2023.
- S. Sarker, S. Roy, and A.Dasgupta, "Prior Knowledge Input Difference-based Compact Model for Predicting the Subband Energy in GAAFETs", International Workshop on Physics of Semiconductor Devices (IWPSD), Chennai, Dec. 2023.
- M. Shukla,M. Ehteshamuddin, A. Kumar, K. Sheelvardhan and A. Dasgupta, "Novel Charge Partitioning Compact Model including Field-Dependent Mobility Degradation Effect for nanoscale MOSFETs", International Workshop on Physics of Semiconductor Devices (IWPSD), Chennai, Dec. 2023.
- A. Kumar, A. Bulusu, S. Mehrotra, and A. Dasgupta, "A Landau Based Compact Model for Multi Domain Ferroelectric Field Effect Transistors", International Workshop on Physics of Semiconductor Devices (IWPSD), Chennai, Dec. 2023.
- K. Sheelvardhan, M. Ehteshamuddin, S. Roy, and A. Dasgupta, "Machine Learning Augmented Hybrid BSIM-CMG Compact Model for Increased Simulation Speed", International Workshop on Physics of Semiconductor Devices (IWPSD), Chennai, Dec. 2023.
- M. Ehteshamudin, A. Kumar, S. Roy and A. Dasgupta, "Optimizing Memory Window and Polarization of a Fe-CAP Using Machine Leaning Assisted Genetic Algorithm Framework", International Workshop on Physics of Semiconductor Devices (IWPSD), Chennai, Dec. 2023.
- A. Srivastava, N. Mishra, P. Ranjan, and A. Dasgupta, "Analysis of the Best Metal Contacts for 2-dimensional MoS2 Based Advanced Devices for Future Technology Nodes", International Workshop on Physics of Semiconductor Devices (IWPSD), Chennai, Dec. 2023.
- N. Mishra, P. Ranjan, S. Roy and A. Dasgupta, "Study of Spin Induced Ferromagnetism in Transition Metal (Mo) doped and Mn-Adsorbed CrI3 Monolayer", International Workshop on Physics of Semiconductor Devices (IWPSD), Chennai, Dec. 2023.
- N. Mishra, P. Ranjan, S. Roy and A. Dasgupta, "Photocatalytic and Optical Properties of TiO2/MoSSe Monolayer for Enhanced IR absorption", International Workshop on Physics of Semiconductor Devices (IWPSD), Chennai, Dec. 2023.
- A. K. Jakhar, S. Guglani, A. Dasgupta, S. Roy, "Prior Knowledge Accelerated Transfer Learning (PKI-TL) for Machine Learning Assisted Uncertainty Quantification of MLGNR Interconnect Networks", IEEE Electrical Performance Electronic Packaging Systems (EPEPS), Milpitas, CA, USA, Oct. 2023.(Invited) EPEPS
- M. Yusuf, S. Singh, B. Sarkar, A. Dasgupta and S. Roy, "A Deep Learning Space Mapping based Enhancement of Compact Models for Accurate Prediction of Trapping in GaN HEMTs from DC to mm-Wave Frequency", International Microwave Symposium (IMS), San Diego, CA, 2023. IMS
- K. Sheelvardhan, S. Guglani, M. Ehteshamuddin, S. Roy and A. Dasgupta, "Variability Aware FET Model with Physics Knowledge Based Machine Learning", IEEE Electron Devices Technology and Manufacturing Conference (EDTM), Seoul, Korea, Mar. 2023. EDTM
- S. Banchhor, N. Bagga, N. Chauhan, S. Manikandan, A. Dasgupta, S. Dasgupta and A. Bulusu, "A New Insight into the Saturation Phenomenon in Nanosheet Transistor: A Device Optimization Perspective", IEEE Electron Devices Technology and Manufacturing Conference (EDTM), Seoul, Korea, Mar. 2023. EDTM
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Journal:
- A. Pon, M. Ehteshamuddin, K. Sheelvardhan and A. Dasgupta, "Analysis of 1/f and G-R Noise in Phosphorene FETs", Solid State Electronics, vol. 200 (108530), 2022.
- N. Mishra, B. Pandey, V. Tomar, A. Dasgupta, S. Kumar, "Investigating the Infrared (IR) Absorption and Optoelectronic Properties of Mn-doped MoSe2 ML by Adsorption of NOx Gas Molecules", IEEE Sensors Journal, vol. 22, no. 23, 2022. Conference:
- M. Subramaniyan, N. Chauhan, N. Bagga, A. Kumar, S. K. Banchhor, S. Roy, A. Dasgupta, A. Bulusu and S. Dasgupta, "Analysis and Modeling of Leakage Currents in Stacked Gate-All-Around Nanosheet Transistors", IEEE International Conference on Emerging Electronics (ICEE), Bengaluru, Dec. 2022.
- A. Kumar, G. Pahwa, A. K. Behera, A. Bulusu, S. Mehrotra and A. Dasgupta, "Analysis and Modeling of Flicker Noise in Ferroelectric FinFETs", IEEE International Conference on Emerging Electronics (ICEE), Bengaluru, Dec. 2022.
- S. Parandiyal, A. Singh, K. Sheelvardhan, S. Guglani, M. Ehteshamuddin, S. Roy and A. Dasgupta, "An Efficient Variability-Aware Control Variate-Assisted Neural Network Model for Advanced Nanoscale Transistors", IEEE International Conference on Emerging Electronics (ICEE), Bengaluru, Dec. 2022.
- G. Pahwa, A. Dasgupta, C. T. Tung, M.Y. Kao, C. K. Dabhi, S. Sarker, S. Salahuddin and C. Hu, "Compact Modeling of Emerging IC Devices for Technology-Design Co-development", IEEE International Electron Devices Meeting (IEDM), San Francisco, 2022. (Invited) IEDM
- S. Guglani, Km Dimple, A. Dasgupta, R. Sharma, B. K. Kaushik and S. Roy, "A Transfer Learning Approach to Expedite Training of Artificial Neural Networks for Variability-Aware Signal Integrity Analysis of MWCNT Interconnects ", IEEE Electrical Performance Electronic Packaging Systems Conference (EPEPS), San Jose, CA, USA, Oct. 2022. EPEPS
- A. Pon, M. Ehteshamuddin, K. Sheelvardhan and A. Dasgupta, "Analysis of 1/f and G-R Noise in Phosphorene FETs", International Conference on Simulation of Semiconductor Processes and Devices (SISPAD), Granada, Spain, Sep. 2022.
- S. Guglani, J. Patel, A. Dasgupta, M.-Y. Kao, C. Hu, S. Roy, "Artificial Neural Network Surrogate Models for Efficient Design Space Exploration of 14-nm FinFETs", Device Research Conference (DRC), Ohio, USA, June 2022. DRC
- A. Kar, S. Sarker, A. Dasgupta, and Y. S. Chauhan, "Impact of Corner Rounding on Quantum Confinement in GAA Nanosheet FETs for Advanced Technology Nodes", Device Research Conference (DRC), Ohio, USA, June 2022. DRC
- N. Chauhan, C. Garg, K. Ni, A. K. Behera, S. Yadav, S. K. Banchhor, N. Bagga, A. Dasgupta, A. Dutta, S. Dasgupta, A. Bulusu, "Impact of Random Spatial Fluctuation in Non-Uniform Crystalline Phases on Multidomain MFIM Capacitor and Negative Capacitance FDSOI", IEEE International Reliability Physics Symposium (IRPS), Dallas, Tx, USA, Mar. 2022. IRPS
- J. Patel, S. Banchor, S. Guglani, A. Dasgupta, S. Roy, A. Bulusu and S. Dasgupta, "Design Optimization Using Symmetric/Asymmetric Spacer for 14 nm Multi-FinFET for Mid-Band 5G Application", International Conference on VLSI Design, Feb. 2022.
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Journal:
- G. Pahwa, P. Kushwaha, A. Dasgupta, S. Salahuddin and C. Hu, "Compact Modeling of Temperature Effects in Modern MOSFETs down to Cryogenic Temperatures", IEEE Transactions on Electron Devices, vol. 68, no. 9, 2021.
- M.-Y. Kao, Y.-H. Liao, G. Pahwa, A. Dasgupta, S. Salahuddin and C. Hu, "Energy Storage and Reuse in Negative Capacitance", IEEE Transactions on Electron Devices, vol. 68, no. 4, 2021. Conference:
- A. Dasgupta, "BSIM-CMG: Compact Model for Gate-All-Around FETs", International Workshop on Physics of Semiconductor Devices (IWPSD), Dec. 2021. (Invited)
- R. Kumar, S. Sarker, S. Dasgupta, A. Dasgupta, S. Roy, "Fast extraction of quantum confinement effect on threshold voltage of Gate-All-Around FETs using machine learning methods", International Workshop on Physics of Semiconductor Devices (IWPSD), Dec. 2021.
- S. Banchhor, N. Bagga, N. Chauhan, S. Manikandan, A. Dasgupta, S. Dasgupta, A. Bulusu, "Analysis of Self-Heating in 5nm Stacked Nanosheet Transistor", International Workshop on Physics of Semiconductor Devices (IWPSD), Dec. 2021.
- A. Dasgupta, "Compact Modeling for Gate-All-Around FET Technology", MOS-AK (Asia Pacific) Workshop, 2021. (Invited)
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Journal:
- A. Dasgupta and C. Hu, "Gate-All-Around FET Design Rule for Suppression of Excess Non-linearity ", IEEE Electron Device Letters, vol. 41, no. 12, 2020. (Editor's pick and Cover mention)
- A. Dasgupta and C. Hu, "BSIM-CMG compact model for IC CAD: from FinFET to Gate-All-Around FET Technology", Journal of Microelectronic Manufacturing, vol. 3, 2020. (Invited)
- P. Kushwaha, A. Dasgupta, M.-Y. Kao, H. Agarwal, S. Salahuddin, C. Hu, "Design Optimization Techniques in Nanosheet Transistor for RF Applications", IEEE Transactions on Electron Devices, vol. 67, no. 10, 2020.
- A. D. Gaidhane, G. Pahwa, A. Dasgupta, A. Verma, and Y. S. Chauhan, "Compact Modeling of Surface Potential, Drain Current and Terminal Charges in Negative Capacitance Nanosheet FET including Quasi-Ballistic Transport", IEEE Journal of Electron Devices Society, vol. 8, 2020.
- M.-Y. Kao, G. Pahwa, A. Dasgupta, S. Salahuddin, C. Hu, "Analysis and Modeling of Polarization Gradient Effect on Negative Capacitance FET", IEEE Transactions on Electron Devices, vol. 67, no. 10, 2020.
- M.-Y. Kao, H. Agarwal, Y.-H. Liao, S. Cheema, A. Dasgupta, P. Kushwaha, A. Tan, S. Salahuddin, C. Hu, "Negative Capacitance Enables FinFET Scaling Beyond 3nm Node", arXiv:2007.14448 [physics.app-ph], 2020.
- C. K. Dabhi, S. S. Parihar, A. Dasgupta, and Y. S. Chauhan, "Compact Model of Negative-Capacitance FDSOI FETs for Circuit Simulations", IEEE Transactions on Electron Devices, vol. 67, no. 7, 2020.
- A. Dasgupta, S. S. Parihar, H. Agarwal, P. Kushwaha, Y. S. Chauhan and C. Hu, "Compact Model for Geometry Dependent Mobility in Nanosheet FETs", IEEE Electron Device Letters, vol. 41, no. 3, 2020.
- A. Dasgupta, S. S. Parihar, P. Kushwaha, H. Agarwal, M.-Y. Kao, S. Salahuddin, Y. S. Chauhan and C. Hu, "BSIM Compact Model for Quantum Confinement in Advanced Nanosheet FETs", IEEE Transactions on Electron Devices, vol. 67, no. 2, 2020. Conference:
- A. D. Gaidhane, G. Pahwa, A. Dasgupta, A. Verma and Y. S. Chauhan, "Compact Modeling of Negative Capacitance Nanosheet FET including Quasi-Ballistic Transport", IEEE Electron Devices Technology and Manufacturing Conference (EDTM), Penang, Malaysia, Mar. 2020. EDTM
- H. Agarwal, P. Kushwaha, A. Dasgupta, M.-Y. Kao, T. Morshed, G. Workman, K. Shanbhag, X. Li, Y. S. Chauhan, S. Salahuddin and C. Hu,, "BSIM-IMG: Advanced Model for FDSOI Transistors with Back Channel Inversion", IEEE Electron Devices Technology and Manufacturing Conference (EDTM), Penang, Malaysia, Mar. 2020. EDTM
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Journal:
- Y.-K. Lin, H. Agarwal, M.-Y. Kao, Z. Zhou, Y. H. Liao, A. Dasgupta, P. Kushwaha, S. Salahuddin, and C. Hu, "Spacer Engineering in Negative Capacitance FinFETs", IEEE Electron Device Letters, vol. 40, no. 6, 2019.
- P. Kushwaha, H. Agarwal, A. Dasgupta, M.-Y. Kao, Y. Lu, Y. Yue, X. Chen, J. Wang, W. Sy, F. Yang, PR. C. Chidambaram, S. Salahuddin, and C. Hu, "Characterization and Modeling of Flicker Noise in FinFETs at Advanced Technology node", IEEE Electron Device Letters, vol. 40, no. 6, 2019.
- M.-Y. Kao, Y.-K. Lin, H. Agarwal, Y.-H. Liao, P. Kushwaha, A. Dasgupta, S. Salahuddin, and C. Hu, "Optimization of NCFET by Matching Dielectric and Ferroelectric Nonuniformly along the Channel", IEEE Electron Device Letters, vol. 40, no. 5, 2019.
- H. Agarwal, P. Kushwaha, Y.-K. Lin, M.-Y. Kao, Y.-H. Liao, A. Dasgupta, S. Salahuddin, and C. Hu, "Proposal for Capacitance Matching in Negative Capacitance Field Effect Transistors", IEEE Electron Device Letters, vol. 40, no. 3, 2019. (EDL cover page)
- A. Dasgupta, A. Verma, and Y. S. Chauhan, "Analysis and Compact Modeling of Insulator-Metal-Transition Material based PhaseFET Including Hysteresis and Multi-domain Switching", IEEE Transactions on Electron Devices, vol. 66, no. 1, 2019. Conference:
- P. Kushwaha, H. Agarwal, A. Dasgupta, Y. K. Lin, M-Y. Kao, Y. S. Chauhan, S. Salahuddin and C. Hu, "Modeling the Quantum Gate capacitance of Nano-Sheet Gate-All-Around MOSFET", IEEE SOI–3D–Subthreshold Microelectronics Technology Unified Conference (S3S), San Francisco, USA, 2019.
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Journal:
- C. K. Dabhi, A. Dasgupta, P. Kushwaha, H. Agarwal, C. Hu, and Y. S. Chauhan, "Modeling of Induced Gate Thermal Noise including Back Bias Effect in FD-SOI MOSFET", IEEE Microwave and Wireless Components Letters, vol. 28, no. 7, 2018.
- A. Dasgupta, P. Rastogi, A. Agarwal, C. Hu, and Y. S. Chauhan, "Compact Modeling of Cross-Sectional Scaling in Gate-All-Around FETs: 3-D to 1-D Transition", IEEE Transactions on Electron Devices, vol. 65, no. 3, 2018. Conference:
- A. Dasgupta, P. Rastogi, D. Saha, A. Gaidhane, A. Agarwal and Y. S. Chauhan, "Modeling of Multi-domain Switching in Ferroelectric Materials: Application to Negative Capacitance FETs", IEEE International Electron Devices Meeting (IEDM), San Francisco, 2018. IEDM
- D. K. Singh, A. Dasgupta, A. Agarwal and Y. S. Chauhan, "Incident Flux based Monte Carlo simulation of Silicon and GaAs FETs in Quasi-ballistic regime", IEEE International Conference on Emerging Electronics (ICEE), Bengaluru, India, 2018.
- P. Rastogi, A. Dasgupta, and Y. S. Chauhan, "Diameter Scaling in III-V Gate-All-Around Transistor for Different Cross-Sections", IEEE International Conference on Electronics, Computing and Communication Technologies (CONECCT), Bengaluru, India, 2018. (Best Paper Award)
- Y. S. Chauhan, C. Yadav, A. Dasgupta, and P. Rastogi, "Atomistic Simulation and Compact Modeling of Atomically Thin Transistors", IEEE International Conference on Electronics and Computer Engineering (ICECE), Dhaka, Bangladesh, 2018. (Invited) Thesis:
- A. Dasgupta, "Compact Modeling of Electrostatics, Quasi-ballistic Transport and Noise in MOSFETs and Magnetic Tunnel Junctions", Ph.D. Thesis, Feb. 2018.
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Journal:
- Y. Sahu, P. Kushwaha, A. Dasgupta, C. Hu, and Y. S. Chauhan, "Compact Modeling of Drain Current Thermal Noise in FDSOI MOSFETs Including Back-Bias Effect", IEEE Transactions on Microwave Theory and Techniques, vol. 65, no. 7, 2017.
- A. Dasgupta, A. Agarwal, and, Y. S. Chauhan, "An Improved Model for Quasi-Ballistic Transport in MOSFETs", IEEE Transactions on Electron Devices, vol. 64, no. 7, 2017.
- A. Dasgupta, A. Agarwal, and, Y. S. Chauhan, "Unified Compact Model for Nanowire Transistors including Quantum Effects and Quasi-ballistic Transport", IEEE Transactions on Electron Devices, vol. 64, no. 4, 2017. Conference:
- D. Datta, H. Dixit, S. Agarwal, A. Dasgupta, M. Tran, D. Houssameddine, Y. S. Chauhan, D. Shum, and F. Benistant, "Quantitative Model for Switching Asymmetry in Perpendicular MTJ: A Material-Device-Circuit Co-Design", IEEE International Electron Devices Meeting (IEDM), San Francisco, Dec. 2017. IEDM
- A. Dasgupta and Y. S. Chauhan, "Modeling of Flicker Noise in Quasi-ballistic FETs", IEEE International Conference on Simulation of Semiconductor Processes and Devices (SISPAD), Kamakura, Japan, Sep. 2017.
- A. Dasgupta, C. Gupta, A. Dutta, Y.-K. Lin, S. Srihari, T. Ethirajan, C. Hu, and Y. S. Chauhan, "Modeling of Body-bias Dependence of Overlap Capacitances in Bulk MOSFETs", IEEE International Conference on VLSI Design, Hyderabad, India, Jan. 2017.
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Journal:
- A. Dasgupta, A. Agarwal, Sourabh Khandelwal and, Y. S. Chauhan, "Compact Modeling of Surface Potential, Charge and Current in Nanoscale Transistors under Quasi-Ballistic Regime", IEEE Transactions on Electron Devices, vol. 63, no. 11, 2016.
- P. Kushwaha, A. Dasgupta, Y. Sahu, S. Khandelwal, C. Hu, and Y. S. Chauhan, "Characterization of RF Noise in UTBB FD-SOI MOSFET", IEEE Journal of the Electron Devices Society, vol. 4, no. 6, 2016.
- A. Dasgupta and Y. S. Chauhan, "Modeling of Induced Gate Thermal Noise in HEMTs", IEEE Microwave and Wireless Components Letters, vol. 26, no. 6, June 2016.
- S. A. Ahsan, S. Ghosh, A. Dasgupta, K. Sharma, S. Khandelwal, and Y. S. Chauhan, "Capacitance Modeling in Dual Field Plate Power GaN HEMT for Accurate Switching Behaviour", IEEE Transactions on Electron Devices, vol. 63, no. 2, 2016. Conference:
- S. Ghosh, S. A. Ahsan, A. Dasgupta, S. Khandelwal, and Y. S. Chauhan, "GaN HEMT Modeling for Power and RF Applications using ASM-HEMT", IEEE International Conference on Emerging Electronics (ICEE), Mumbai, India, Dec. 2016.
- D. K. Singh, A. Dasgupta, and Y. S. Chauhan, "Accurate Modeling of Centroid Shift in III-V FETs including Non-linear Potential Profile and Wave-function Penetration", IEEE International Conference on Emerging Electronics (ICEE), Mumbai, India, Dec. 2016.
- S. Ghosh, A. Dasgupta, A. K. Dutta, S. Khandelwal, and Y. S. Chauhan, "Physics based Modeling of Gate Current including Fowler-Nordheim Tunneling in GaN HEMT", IEEE International Conference on Emerging Electronics (ICEE), Mumbai, India, Dec. 2016.
- A. Dasgupta, H. Agarwal, A. Agarwal, and Y. S. Chauhan, "Modeling of Flicker Noise in Quasi-ballistic devices", IEEE International Conference on Emerging Electronics (ICEE), Mumbai, India, Dec. 2016.
- C. K. Dabhi, A. Dasgupta, and Y. S. Chauhan, "Computationally efficient Analytical Surface Potential model for UTBB FD-SOI Transistors", IEEE International Conference on Emerging Electronics (ICEE), Mumbai, India, Dec. 2016.
- C. K. Dabhi, P. Kushwaha, A. Dasgupta, H. Agarwal, and Y. S. Chauhan, "Impact of Back Plane Doping on RF Performance of FD-SOI Transistor using Industry Standard BSIM-IMG Model", IEEE International Conference on Emerging Electronics (ICEE), Mumbai, India, Dec. 2016.
- A. Dasgupta, S. Ghosh, S. A. Ahsan, S. Khandelwal, N. Defrance, and Y. S. Chauhan, "Modeling DC, RF and Noise behavior of GaN HEMTs using ASM-HEMT Compact Model", IEEE International Microwave and RF Conference (IMaRC), Delhi, India, Dec. 2016.
- S. A. Ahsan, S. Ghosh, A. Dasgupta, S. Khandelwal, and Y. S. Chauhan, "ASM-HEMT: Advanced SPICE Model for Gallium Nitride High Electron Mobility Transistors", International Conference of Young Researchers on Advanced Materials (ICYRAM), Bangalore, India, Dec. 2016.
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Journal:
- A. Dasgupta, S. Khandelwal, and Y. S. Chauhan, "Surface potential based Modeling of Thermal Noise for HEMT circuit simulation", IEEE Microwave and Wireless Components Letters, vol. 25, no. 6, 2015.
- S. Ghosh, A. Dasgupta, S. Khandelwal, S. Agnihotri, and Y. S. Chauhan, "Surface-Potential-Based Compact Modeling of Gate Current in AlGaN/GaN HEMTs", IEEE Transactions on Electron Devices, vol. 62, no. 2, 015. Conference:
- S. Agnihotri, S. Ghosh, A. Dasgupta, A. Ahsan, S. Khandewal, and Y. S. Chauhan, "Modeling of Trapping Effects in GaN HEMTs", IEEE India Conference (INDICON), New Delhi, India, Dec. 2015.
- A. Dasgupta, A. Agarwal, and Y. S. Chauhan, "Compact Model for charge centroid in III-V FETs", International Workshop on Physics of Semiconductor Devices (IWPSD), Bangalore, India, Dec. 2015.
- K. Sharma, S. Ghosh, A. Dasgupta, S. A. Ahsan, S. Khandelwal, and Y. S. Chauhan, "Capacitance Analysis of Field Plated GaN HEMT", International Workshop on Physics of Semiconductor Devices (IWPSD), Bangalore, India, Dec. 2015.
- A. Dasgupta, A. Agarwal, and Y. S. Chauhan, "Compact Modeling of Quasi-Ballistic transport in FETs", International Workshop on Physics of Semiconductor Devices (IWPSD), Bangalore, India, Dec. 2015.
- J. P. Duarte, S. Khandelwal, A. Medury, C. Hu, P. Kushwaha, H. Agarwal, A. Dasgupta, and Y. S. Chauhan "BSIM-CMG: Standard FinFET Compact Model for Advanced Circuit Design", IEEE European Solid-State Circuit Conference (ESSCIRC), Graz, Austria, Sept. 2015. (Invited) ESSCIRC
- S. A. Ahsan, S. Ghosh, K. Sharma, A. Dasgupta, S. Khandelwal, and Y. S. Chauhan, "Capacitance Modeling of a GaN HEMT with Gate and Source Field Plates", IEEE International Symposium on Compound Semiconductors (ISCS), Santa Barbara, USA, June 2015.
- A. Dasgupta and Y. S. Chauhan, "Surface Potential Based Modeling of Induced Gate Thermal Noise for HEMTs", IEEE International Symposium on Compound Semiconductors (ISCS), Santa Barbara, USA, June 2015.
- A. Dasgupta, S. Ghosh, S. Khandelwal, and Y. S. Chauhan, "ASM-HEMT: Compact model for GaN HEMTs", IEEE Conference on Electron Devices and Solid-State Circuits (EDSSC), Singapore, June 2015.
- K. Sharma, A. Dasgupta, S. Ghosh, S. A. Ahsan, S. Khandelwal, and Y. S. Chauhan, "Effect of Access Region and Field Plate on Capacitance behavior of GaN HEMT", IEEE Conference on Electron Devices and Solid-State Circuits (EDSSC), Singapore, June 2015.
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Journal:
- A. Dasgupta, S. Khandelwal, and Y. S. Chauhan, "Compact Modeling of Flicker Noise in HEMTs", IEEE Journal of the Electron Devices Society, vol. 2, no. 6, 2014. Conference:
- A. Dasgupta, C. Yadav, P. Rastogi, A. Agarwal, and Y. S. Chauhan, "Analysis and Modeling of Quantum Capacitance in III-V Transistors", IEEE International Conference on Emerging Electronics (ICEE), Bangalore, India, Dec. 2014. (Best Poster Award)
- S. Khandelwal, T. A. Fjeldly, Y. S. Chauhan, B. Iniguez, S. Ghosh, A. Dasgupta, K. Sharma, "ASM-HEMT Model: A Physics-based Compact Model for GaN HEMTs", MOS-AK Workshop, Berkeley, USA, Dec. 2014. Thesis:
- A. Dasgupta, "Noise modeling in High Electron Mobility Transistors", M.Tech Thesis, May. 2014.
- S. Agnihotri, S. Ghosh, A. Dasgupta, S. Khandewal, and Y. S. Chauhan, "A Surface Potential based Model for GaN HEMTs", IEEE PrimeAsia, Visakhapatnam, Dec. 2013. (Gold Leaf Certificate)